Leeladhar Bandi

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Packet-switching networks on chip (NoCs) have emerged as a promising paradigm for designing scalable communication infrastructures for future chip multiprocessors and complex Systems on Chip (SoCs). However, the quest for highperformance networks has led to very area-consuming and complicated routers with little return in performance. This paper presents(More)
Packet-switching networks on chip (NoCs) have emerged as a promising paradigm for designing scalable communication infrastructures for future chip many-core processors and complex Systems on Chip (SoCs). However, the quest for high-performance networks has led to very area-consuming and complicated routers. Buffers consume a significant portion of the(More)
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