Laurent Montès

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The growth of semiconductor (SC) nanowires (NW) by CVD using Au-catalyzed VLS process has been widely studied over the past few years. Among others SC, it is possible to grow pure Si or SiGe NW thanks to these techniques. Nevertheless, Au could deteriorate the electric properties of SC and the use of other metal catalysts will be mandatory if NW are to be(More)
In recent papers conduction mechanism in tantalum pentoxide MIM capacitors was found to follow the space charge limited theory and the asymmetry between positive and negative polarization was attributed to an inhomogeneous spatial distribution of traps. Furthermore, the role of the top electrode geometry on the conduction was highlighted using a large range(More)
Three-dimensional architecture appears today to be essential for the next high density MIM capacitor generation. Thus, the classical PVD method usually used for the electrode deposition must be replaced by conformal deposition methods, like CVD method. In this paper, trapping phenomenon of metal-insulator-metal capacitors using CVD-TiN for electrodes and(More)
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