Laurence Moquillon

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A millimeter-wave power amplifier (PA) implemented in a 65 nm CMOS process with 8-metal layers and transistor f<sub>T</sub>/f<sub>MAX</sub> of 160/200 GHz is reported. The PA operates from a 1.2 V supply voltage. A power gain of 13.4 dB, an output P<sub>1dB</sub> of 12.2 dBm with 7.6 % PAE and a saturated output power of 13.8 dBm at 58 GHz are measured.(More)
A hot carrier ageing model previously validated on a one-stage 60-GHz power amplifier (PA) is demonstrated to be able to predict the degradation of the characteristic parameters for multistage high-performance millimeter-wave (mmW) PAs. The increase in the threshold voltage, the decrease in the transconductance, and the output conductance of the MOSFETs(More)
This work presents the performance of a 24-GHz transceiver for automotive short-range radar. Complying with the pulsed radar sensor requirements, this single-chip is the first silicon realization with this high-level of integration. The single-chip results were obtained at 24 GHz using a standard 0.13 mum BiCMOS SiGe 170 GHz f<sub>T</sub> featuring 1.7 V(More)
This work presents the performance of an integrated low noise amplifier (LNA) and Gilbert cell mixer integration and also a voltage controlled oscillator (VCO) performance. Differential topology was used to achieve the down converter. LNA measurements report 22.5 dB gain and about 3.2 dB noise figure at 24 GHz. Large signal results give IP<sub>1dB</sub> of(More)
The effects of dc hot carrier stress on the characteristics of 60GHz power amplifiers on CMOS 65nm are investigated. The increase in the threshold voltage, the decrease in the transconductance and the output conductance of the MOSFETs caused by hot carriers leads to a loss performances of the PAs. A reliability study is first made on a 1 stage PA to(More)
An improved analytical model of the CMOS 65-, 45-, and 32-nm silicon technology integrated transmission line is proposed. This model is derived from previous classical ones used for printed circuits board lines. Improvements have been performed to take into account the size of integrated lines. The study is validated up to millimeter-wave frequencies for(More)
An improved analytical model for integrated microstrip line experienced on 45 nm silicon technology is proposed. This model is derived from previous classical ones used for PCB circuits. Improvements have been performed to take into account the sizing effects for integrated lines. The study is performed up to 110 GHz for different line widths and results(More)
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