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This paper presents an innovative architecture to drastically enlarge the bandwidth of the Doherty power amplifier (DPA). The proposed topology, based on novel input/output splitting/combining networks, allows to overcome the typical bandwidth limiting factors of the conventional DPA. A complete and rigorous theoretical investigation of the developed(More)
In this paper, a novel technique to design concurrent dual-band high-efficiency harmonic tuned (HT) power amplifiers (PAs) is presented. The proposed approach is based on a methodology developed to design multifrequency passive matching networks, which allows concurrent operability. The network design criterion is heavily investigated and later generalized(More)
This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Cree's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for(More)
This contribution presents the theoretical analysis and design guidelines to increase the average efficiency of a Doherty power amplifier (DPA), accounting for the device on-resistance. Starting from a simplified device model, closed-form equations for the estimation of both design parameters and obtainable performances are reported. Moreover, advantages(More)
In this contribution for the first time the design of a simultaneous dual band high efficiency harmonic tuned power amplifier is presented. The active device used is a GaN HEMT with 1 mm of gate periphery. The realised amplifier operates at 2.45 Ghz and 3.3 GHz, and the measured results shown a drain efficiency of 53% and 46%, with an output power of 33 dBm(More)
The aim of this paper is to present a closed-form formulation suitable for a direct computer-aided design synthesis of a Doherty amplifier employing a Class F design strategy for the Main (or Carrier) device. For this purpose, starting from a simplified model for the adopted active devices, the behavioral analysis of the Class F Doherty amplifier is carried(More)
This paper presents a complete and rigorous theoretical investigation of a Doherty architecture with a novel output combining network. The benefits in terms of bandwidth and feasibility held by the proposed topology are investigated and compared with the conventional one. In particular, the theoretical analysis demonstrates that the proposed output combiner(More)
This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Cree's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for(More)
One of the main drawback of the Doherty architecture is related to the intrinsic lower power gain attainable with respect to the nominal value assured by the Main amplifier. A proposed solution, discussed in this paper, is based on the use of different bias voltages for the Main and Auxiliary amplifiers. To validate the methodology, a Doherty Power(More)