L. Hudepohl

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The system, process, and design implications of converting a microprocessor chip set originally implemented in a 5-V, 1.5- mu m (drawn) CMOS process to one implemented in a 3.3-V, 1.0- mu m (drawn) CMOS process are described. The chip set is 75% faster than the previous generation and comprises a processor chip, a floating-point chip, a cache controller(More)
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