L F Hutter

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In this work, performance advances are featured for new and improved multi voltage rated (16 V to 60 V) LDMOS. Performance improvements were achieved by leveraging off of (1) an optimized off-set, photo aligned, coimplanted double-diffused well (DWL), (2) two n-type dopings in the drift region, and (3) shrink from 1.0 /spl mu/m to 0.72 /spl mu/m. The R/sub(More)
Capacitor matching is an important device parameter for precision analog applications. In the last ten years, the floating gate measurement technique has been widely used for its characterization. As technologies advance, however, new challenges emerge. In this paper we describe the impact of MOSFET thin gate oxide leakage on the technique. SPICE(More)
The competitive PC peripheral application market drives the goal to develop a compressed, low-cost BiCMOS power technology with state-of-the-art specific-on-resistance (R/sub sp/) at the 20 V node. The 20 V rated lateral power device is difficult to optimize because modern VLSI processes tend to physically limit surface BV to about 13-19 V in planar(More)
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