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The paper discusses the evolutionary computation approach to the problem of optimal synthesis of Quantum and Reversible Logic circuits. Our approach uses standard Genetic Algorithm (GA) and its relative power as compared to previous approaches comes from the encoding and the formulation of the cost and fitness functions for quantum circuits synthesis. We(More)
Dynamic migration of virtual machines on a cluster of physical machines is designed to maximize resource utilization by balancing loads across the cluster. When the utilization of a physical machine is beyond a fixed threshold, the machine is deemed overloaded. A virtual machine is then selected within the overloaded physical machine for migration to a(More)
The high complexity and the short lifetime of 3D graphics acceleration hardware increase the necessity of an environment for hardware development. For easy modification and fast testing of architecture, a high-level language based environment is desirable. Therefore, in this paper we propose a Graphics Architecture Testing Environment (GATE) that is based(More)
—A high-speed three-dimensional (3-D) graphics SoC for consumer applications is presented. A 166-MHz 3-D graphics full pipeline engine with performance of 33 Mvertices/s and 1.3 Gtexels/s, and 333-MHz ARM11 RISC processor, and video composition IPs are integrated together on a single chip. The geometry part of 3-D graphics IP provides full programmability(More)
Reducing the required memory bandwidth is a main issue in 3D computer graphics. PN triangle solves the memory bandwidth problem by using curved surface representation and tessellation. It reconstructs a smooth and detailed 3D model from blocky one on graphics hardware and then reduces bandwidth consumption. To implement a simple dedicated hardware executing(More)