Kyoung-Hoi Koo

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A New level-up shifter aimed at ultra low core voltage and wide range I/O voltage is designed using a 90nm CMOS process. Proposed level shifter uses analog circuit techniques and standard zero-Vt NMOS transistor without adding extra mask or process step. No static power consumption and stable duty ratio make this level shifter suitable for wide I/O(More)
A versatile I/O buffer is proposed to interface compensate for the process, voltage and temperature DDR/DDR2/GDDR3 memory types. A new robust impedance variations as well as to accommodate different interfaces. calibration scheme which fills the role of off-chip driver(OCD) and on-die terminator(ODT) for improving signal integrity is introduced. A.(More)
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