2006 IEEE Computer Society Conference on Computer…
2006
We integrate the cascade-of-rejectors approach with the Histograms of Oriented Gradients (HoG) features to achieve a fast and accurate human detection system. The features used in our system are HoGs… (More)
We present a method of automatic generation of functional vectors for sequential circuits. A high-level description of the circuit, in VHDL or C, is assumed available. Our method automatically… (More)
This paper presents a method of multi-level logic optimization for combinational and synchronous sequential logic. The circuits are optimized through iterative addition and removal of redundancies.… (More)
This paper presents a method of partial scan design in which the selection of scan flip-flops is aimed at breaking up the cyclic structure of the circuit. Experimental data are given to show that the… (More)
We present a method of automatic generation of functional vectors for sequential circuits. These vectors can be used for design verification, manufacturing testing, or power estimation. A high-level… (More)
The efficiency, robustness and distinctiveness of a feature descriptor are critical to the user experience and scalability of a mobile Augmented Reality (AR) system. However, existing descriptors are… (More)
We propose a false-path-aware statistical timing analysis framework. In our framework, cell as well as interconnect delays are assumed to be correlated random variables. Our tool can characterize… (More)
IEEE Transactions on Pattern Analysis and Machine…
2013
The efficiency and quality of a feature descriptor are critical to the user experience of many computer vision applications. However, the existing descriptors are either too computationally expensive… (More)