Kwang Sub Yoon

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This paper proposes a dual band VCO with a standard 0.35? CMOS process to generate 1.07GHz and 2.06GHz. The proposed VCO architecture with 50% duty cycle circuit and a half adder(HA) is able to produce a frequency two times higher than that of the conventional VCOs. The measurement results demonstrate that the gain of VCO and power dissipation are 561MHz/V(More)
This paper describes a 10 bit CMOS currentmode A/D converter with a current predictor and a modular current reference circuit. A current predictor and a modular current reference circuit are employed to reduce the number of comparator and reference current mirrors and consequently to decrease a power dissipation. The 10 bit current-mode A/D converter is(More)
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