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- Hiroshi Murata, Kunihiro Fujiyoshi, Shigetoshi Nakatake, Yoji Kajitani
- IEEE Trans. on CAD of Integrated Circuits and…
- 1996

The earliest and the most critical stage in VLSI layout design is the placement. The background of which is the rectangle packing problem: Given set of rectangular modules of arbitrary sizes, place them without overlap on a plane within a rectangle of minimum area. Since the variety of the packing is uncountably infinite, the key issue for successful… (More)

- Shigetoshi Nakatake, Kunihiro Fujiyoshi, Hiroshi Murata, Yoji Kajitani
- Proceedings of International Conference on…
- 1996

A new method of packing the rectangles (modules) is presented with applications to IC layout design. It is based on the bounded-sliceline grid (BSG) structure. The BSG dissects the plane into rooms associated with binary relations ``right-to''and ``above'' such that any two rooms are uniquely in either relation. A packing is obtained through an assignment… (More)

The first and the most critical stage in VLSI layout design is the placement, the background of which is the rectangle packing problem: Given many rectangular modules of arbitrary size, place them without overlapping on a layer in the smallest bounding rectangle. Since the variety of the packing is infinite (two- dimensionally continuous) many, the key… (More)

- Shigetoshi Nakatake, Kunihiro Fujiyoshi, Hiroshi Murata, Yoji Kajitani
- IEEE Trans. on CAD of Integrated Circuits and…
- 1998

A new method of packing the rectangles is proposed with applications to integarted circuit (IC) layout design. A special work-sheet, called the bounded-sliceline grid, is introduced. It consists of special segments that dissect the plane into rooms to which binary relations “right-of”and “above” are associated such that any two rooms are uniquely in either… (More)

- Kunihiro Fujiyoshi, Hiroshi Murata
- ISPD
- 1999

The sequence-pair was proposed in 1994 as a representation of the packing of rectangles of general structure. Since then, there have been efforts to expand its applicability over simple rectangles. This paper proposes a new way to represent the packing of a set of rectilinear blocks, including arbitrary concave rectilinear blocks. Our idea is in… (More)

- Shinichi Koda, Chikaaki Kodama, Kunihiro Fujiyoshi
- IEEE Transactions on Computer-Aided Design of…
- 2007

In recent high-performance analog integrated circuit design, it is often required to place some cells symmetrically to a horizontal or vertical axis. Balasa et al. proposed a method of obtaining the closest placement that satisfies the given symmetry constraints and the topology constraints imposed by a sequence-pair (seq-pair). However, this method has the… (More)

- Hiroshi Murata, Kunihiro Fujiyoshi, Mineo Kaneko
- ISPD
- 1997

In a typical VLSI/PCB design, some modules are pre-placed in advance, and the other modules are requested to be placed without overlap with these pre-placed modules. The presence of such obstacles introduces inconsistency to a coding scheme, called sequence-pair, which has been proposed for an obstacle free placement problem. We solve this di culty by… (More)

- Chikaaki Kodama, Kunihiro Fujiyoshi
- ASP-DAC
- 2003

In this paper, we propose "selected sequence-pair" (SSP), a sequence-pair (seq-pair) with the limited number of subsequences called adjacent crosses. Its features are: (1) The smallest packing based on a given SSP can be obtained in <i>O(n)</i> time, where <i>n</i> is the number of rectangles. (2) An arbitrary packing can be represented by SSP. (3) The… (More)

- Shinichi Kouda, Chikaaki Kodama, Kunihiro Fujiyoshi
- ISPD
- 2006

Recently, it is often required in high performance analog IC design that some cells are placed symmetrically to horizontal or vertical axis. Balasa et al. proposed a method of obtaining the closest placement satisfying the given symmetry constraints and the topology constraints imposed by a sequence-pair, but this method has the following defects: (1) Some… (More)

- Kunihiro Fujiyoshi, Hidenori Kawai, Keisuke Ishihara
- ISCAS
- 2007