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With the wide use of floating-point (FP) multiply and accumulate operations in multimedia and digital signal processing applications, many modern processors adopt FP multiply-add fused unit (MAF) to achieve high performance, improve accuracy and reduce power consumption. However, FP arithmetic units usually occupy the major portion of a processor's area and(More)
Complement factor 5a (C5a) interaction with its receptor (C5aR1) contributes to the pathogenesis of inflammatory diseases, including acute kidney injury. However, its role in chronic inflammation, particularly in pathogen-associated disorders, is largely unknown. Here we tested whether the development of chronic inflammation and renal fibrosis is dependent(More)
Floating-point (FP) multipliers are the main energy consumers in many modern embedded digital signal processing (DSP) and multimedia systems. For lossy applications, minimizing the precision of FP multiplication operations under the acceptable accuracy loss is a well-known approach for reducing the energy consumption of FP multipliers. This paper proposes a(More)
This paper proposes a simple and efficient Montgomery multiplication algorithm such that the low-cost and high-performance Montgomery modular multiplier can be implemented accordingly. The proposed multiplier receives and outputs the data with binary representation and uses only one-level carry-save adder (CSA) to avoid the carry propagation at each(More)
A multi-threaded programmable shader pipeline 3D graphics SoC with support for OpenGL ES 2.0 has been developed and fabricated. The sample chip is ARMv4T compatible with the 3D processing capability of 14.9 Mvertices/s, 3.6 Mpixels/s and up to 4K resolution. The die size is 3.85&#x00D7;3.85 mm<sup>2</sup>, with 2.96M gates on a TSMC 90nm CMOS 1P9M. This new(More)
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