Kumar Yelamarthi

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This paper describes a system to improve indoor navigation through use of radio frequency identification (RFID) technology. The terminal unit is an embedded system equipped with an RFID reader for localization, a mobile robot for navigation, and a combination of ultrasonic and IR sensors for obstacle detection and avoidance during navigation. To increase(More)
One of the most prominent challenges in Wireless Sensor Network (WSN) is target localization. As majority of the decisions made in navigation and path planning are dependent on current information available, target localization is one of the fundamental requirements. This paper presents accuracy studies on target localization using the Time Difference of(More)
This paper presents a Microsoft Kinect based vibrotactile feedback system to aid in navigation for the visually impaired. The lightweight wearable system interprets the visual scene and presents obstacle distance and characteristic information to the user. The scene is converted into a distance map using the Kinect, then processed and interpreted using an(More)
This paper describes an RFID and GPS integrated navigation system, Smart-Robot (SR) for the visually impaired. The SR uses RFID and GPS based localization while operating indoor and outdoor respectively. The portable terminal unit is an embedded system equipped with an RFID reader, GPS, and analog compass as input devices to obtain location and orientation.(More)
This paper describes a radio frequency identification (RFID) and sonar-guided tour guide robot, CATE (Central’s Automated Tour Experience). The portable terminal unit is an embedded system equipped with an RFID reader for localization, and sonar and IR sensors for obstacle detection and avoidance. CATE can guide the visitor through a predefined tour of the(More)
The complexity in timing optimization of highperformance microprocessors has been increasing with the number of channel-connected transistors in various paths of dynamic CMOS circuits and the rising magnitude of process variations in nanometer CMOS process. In this paper, a process variation aware transistor sizing algorithm for dynamic CMOS circuits while(More)
Most of the existing Structural Health Monitoring (SHM) systems are vulnerable to environmental and operational damages. Yet, majority of these systems cannot detect the size and location of the damage. Guided wave techniques are widely used to detect damage in structures due to its sensitivity to different changes in the structure. Finding a mathematical(More)
The advancement in CMOS technology with the shrinking device size towards 32 nm has allowed for placement of billions of transistor on a single microprocessor chip. Simultaneously, it reduced the logic gate delays to the order of pico seconds. However, these low delays and shrinking device sizes have presented design engineers with two major challenges:(More)
Dynamic CMOS circuits are significantly used in high-performance very large-scale integrated (VLSI) systems. However, they suffer from limitations such as noise tolerance, charge leakage, and power consumption. With the escalating impact of process variations on design performance, aggressive technology scaling, noise in dynamic CMOS circuit has become an(More)