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This paper proposes a high-performance low-power direct 2-D transform coding IP design for H.264 with a switching power suppression technique. The proposed transform coding design not only suitably arranges the data sequences in row and column transforms to greatly increase the data processing rate but also takes advantage of the correlation existed in(More)
Excitatory amino acids (EAAs) play a critical role in the development of peripheral tactile and thermal hypersensitivity after the induction of paw inflammation in rats. We used a spinal microdialysis model to examine the effect of complete Freund's adjuvant (CFA)-induced inflammation on the spinal release of EAAs and assessed the antinociceptive effect of(More)
BACKGROUND AND STUDY AIMS The best anesthesia methods for analgesia and sedation during gastrointestinal endoscopy are still debated. The aim of this study was to compare the recovery time, clinical presentations, and satisfaction between target-controlled infusion (TCI) and manually controlled infusion (MCI) in same-day bidirectional endoscopy(More)
A significant loss of neurons in the dorsal root ganglia (DRG) has been reported in animal models of peripheral nerve injury. Neonatal sensory neurons are more susceptible than adult neurons to axotomy- or nerve growth factor (NGF) withdrawal-induced cell death. To develop therapies for preventing irreversible sensory cell loss, it is essential to(More)
BACKGROUND Several molecular changes occur following axotomy, such as gene up-regulation and down-regulation. In our previous study using Affymetrix arrays, it was found that after the axotomy of sciatic nerve, there were many novel genes with significant expression changes. Among them, neuronatin (Nnat) was the one which expression was significantly(More)
This paper proposes an efficient Spurious Power Suppression Technique (SPST) and its applications on an MPEG-4 AVC/H.264 transform coding design. There are three techniques addressed in this paper, which are (1) the SPST, (2) the direct 2-D algorithm, and (3) the interlaced I/O schedule to solve the design challenges induced by both the real-time processing(More)