Krzysztof Bilinski

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This paper presents new algorithms for the synthesis of parallel controllers that operate on a Petri net. This net is first simplified by reduction, then coloured and finally used to generate a state assignment with which the controller can be synthesised. The new concept of using colours for detecting and representing concurrency within the Petri net is(More)
A unied f r amework and associated algorithms for a b ehavioural synthesis of parallel controllers from a multiple{process VHDL specication is presented. An extension to FSMs, based on Petri nets, is used a s a n internal representation of an concurrent system during the synthesis. The VHDL simulation cycle implications are explicitly implemented into the(More)
A ne'w algorithm for verifying the equivalence of parallel controller designs is presented along with its implementation. The-controller is specified using a Petri net, and its implementation is given as a netlist. The ,reachability graph of the Petri net is generated and simultaneously the network is implicitly simulated. By exploiting information from the(More)
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