Krzysztof Bilinski

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This paper presents new algorithms for the synthesis of parallel controllers that operate on a Petri net. This net is first simplified by reduction, then coloured and finally used to generate a state assignment with which the controller can be synthesised. The new concept of using colours for detecting and representing concurrency within the Petri net is(More)
A uni ed framework and associated algorithms for a behavioural synthesis of parallel controllers from a multiple{process VHDL speci cation is presented. An extension to FSMs, based on Petri nets, is used as an internal representation of an concurrent system during the synthesis. The VHDL simulation cycle implications are explicitly implemented into the(More)
In this paper a method based on the use of Zero{ Suppressed BDDs (0{Sup{BDDs) to symbolic state space exploration of parallel controllers is presented. Unlike traditional methods, the new approach is based on the implicit manipulation of sets of states instead of the manipulation of their characteristic functions. A formal speci cation of the parallel(More)
A ne’w algorithm for verifying the equivalence of parallel controller designs is presented along with its implementation. The -controller is specified using a Petri net, and its implementation is given as a netlist. The ,reachability graph of the Petri net is generated and simultaneously the network is implicitly simulated. By exploiting information from(More)
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