Koushik Niyogi

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Due to increasing clock speeds and shrinking technologies, distributing a single global clock signal throughout a chip is becoming a difficult and challenging proposition. In this paper, we address the problem of energy optimal local speed and voltage selection in frequency/voltage island based systems under given performance constraints. Our results show(More)
Nodes in a sensor network are typically severely constrained by the amount of power available to them. Furthermore, power consumption by the wireless radio in a sensor node is an order of magnitude higher than the power consumption of computation on the node. We present two techniques that exploit this characteristic of sensor nodes to reduce the power(More)
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising technique in the system on a chip (SoC) era. In the context of today's increasingly complex SoCs, there is a need for design methodologies that start at higher levels of(More)
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