Learn More
—This paper presents a 60-GHz direct-conversion RF front-end and baseband transceiver including analog and digital circuitry for PHY functions. The 65-nm CMOS front-end consumes 319 and 223 mW in transmitting and receiving mode, respectively. It is capable of more than 7-Gb/s 16QAM wireless communication for every channel of the 60-GHz standards, which can(More)
— This paper presents a 16QAM direct-conversion transceiver in 65 nm CMOS, which is capable of 60-GHz wireless standards. The capacitive cross-coupling neutralization contributes a high common-mode rejection and a high reverse isolation, and a fully-balanced mixer can improve the error vector magnitude due to the reduced local leakage. The maximum data(More)
SUMMARY An L-2L through-line de-embedding method has been verified up to millimeter wave frequency. The parasitics of the pad can be modeled from the L-2L through-line. Measurement results of the transmission lines and transistors can be de-embedded by subtracting the parasitic matrix of the pad. Therefore, the de-embedding patterns, which is used for(More)
This paper presents a 60GHz power amplifier using a capacitive cross-coupling neutralization. The capacitive cross-coupling neutralization contributes to improve power gain and reverse isolation. Moreover, the transmission line for matching networks is optimized to achieve highly power-efficient amplifier. The 3-stage differential power amplifier is(More)
—This paper proposes the method of varactor cross-couplng with adaptive bias. The capacitive cross-coupling neu-tralization contributes to improve power gain and reverse isolation. The optimized capacitance of cross-coupled PA depends heavily on the input power. Thus, the varacter is used and adaptive bias is obtained by the feedback of the input power. The(More)
— Practical characterization of active and passive devices in CMOS technology is presented in this paper for designing millimeter-wave power amplifiers. Detailed modeling strategy for transmission line, T-junction, and transistor is explained with some actually-designed millimeter-wave amplifiers. A 4-stage PA is implemented in 65nm CMOS process. A 20dB(More)
At 60 GHz, it becomes difficult to achieve a high power added efficiency (PAE) and large output power for CMOS power amplifier (PA). A parallel class-A and AB pseudo Doherty PA is designed in CMOS 65 nm process to obtain a high PAE and large output power. The PA achieves a 9.8-dB gain at 60 GHz. The measured large signal results show that a maximum power(More)