King-Chun Tsai

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—This paper presents a 1-W, class-E power amplifier that is implemented in a 0.35-m CMOS technology and suitable for operations up to 2 GHz. The concept of mode locking is used in the design, in which the amplifier acts as an oscillator whose output is forced to run at the input frequency. A compact off-chip microstrip balun is also proposed for output(More)
The increasing demand for small-form-factor, wireless devices motivates research on highly-integrated, low-cost transmitters [1]. This work describes techniques that potentially allow implementation of the transmitter at higher levels of integration than previously achieved. A prototype CMOS IC for a narrow-band PCS system operating at 1.75GHz includes two(More)
Issues associated with the integration of transceiver components on to a single silicon substrate are discussed. In particular, recently proposed receiver and transmitter architectures for high integration are examined on the promise of providing multistandard capability. In addition, existing barriers to lower power transceiver operation are examined as(More)
Issues associatccd with the integration of transceiver components on to a single silicon substrate are discussed. In particular, recently proposed receiver and transmitter architectures for high integration are examined on the promise of providing multi-standard capability. In additifon, existing barriers to lower power transceiver operation are examined as(More)
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