Khushwinder Jasrotia

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— In this paper, we argue that the classic micro-architecture model, namely finite state machine with datapath (FSMD), cannot handle procedure abstraction needed by complex applications. This presents one of the major obstacles for the adoption of high-level synthesis technology in practice. We propose a simple extension of FSMD, called stacked FSMD, which(More)
Area Optimizations in FPGA Architecture and CAD 2005 Field programmable gate arrays (FPGAs) are an increasingly popular implementation medium for digital circuits. An FPGA is a prefabricated piece of silicon that can be configured by the user to implement any digital circuit. This ability enables them to offer two key advantages over other implementation(More)
High-Level synthesis is a process that automates the transformation of an algorithmic description of a digital design into its physical implementation. With digital systems' ever increasing complexity in terms of transistor count and clock speed, it becomes necessary for a high-level synthesis tool to work at higher levels of abstraction in order to(More)
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