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We describe new multi-ported cache designs suitable for use in FPGA-based processor/parallel-accelerator systems, and evaluate their impact on application performance and area. The baseline system comprises a MIPS soft processor and custom hardware accelerators with a shared memory architecture: on-FPGA L1 cache backed by off-chip DDR2 SDRAM. Within this(More)
In this paper, we report our findings on the adoption practices of used personal digital assistants (PDAs) to inform reuse of outdated computing products. Our interviews with 12 eBay users who bought used PDAs showed a variety of ways in which users indirectly supported sustainability. This allowed us to re-examine sustainability as something that is(More)
The Visualization for Cyber Security research community (VizSec) addresses longstanding challenges in cyber security by adapting and evaluating information visualization techniques with application to the cyber security domain. This research effort has created many tools and techniques that could be applied to improve cyber security, yet the community has(More)
Video connections can establish a media space in which games may be played, just as people play games while collocated. Experiments with participants playing the game 'Mafia' indicate that people in a video condition have similar levels of satisfaction, fun, and frustration, to those that play while collocated. This finding holds for both those with prior(More)
Resource sharing is a key area-reduction approach in high-level synthesis (HLS) in which a single hardware functional unit is used to implement multiple operations in the high-level circuit specification. We show that the utility of sharing depends on the underlying FPGA logic element architecture and that different sharing trade-offs exist when 4-LUTs vs.(More)
As modern industry shifts toward significant globalization, robust and adaptable network capability is increasingly vital to the success of business enterprises. Large quantities of information must be distilled and presented in a single integrated picture in order to maintain the health, security and performance of global networks. We present a design for(More)
We have developed an ontology based framework that evaluates compatibility between processing modules within an end user development framework, using MIT Lincoln Laboratory's Composable Analytics environment [1] as a test case. In particular, we focus on inter-module semantic compatibility as well as compatibility between data and modules. Our framework(More)
This, paper presents the FISH (FPGA-Initiated Software-Handled) framework which allows FPGA accelerators to make system calls to the Linux operating system in CPU-FPGA systems. A special FISH Linux kernel module running on the CPU provides a system call interface for FPGA accelerators, much like the ABI which exists for software programs. We provide a(More)
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