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— Multi-core platforms are emerging trends in the design of Systems-on-Chip (SoCs). Interconnect fabrics for these multi-core SoCs play a crucial role in achieving the target performance. The Network-on-Chip (NoC) paradigm has been proposed as a promising solution for designing the interconnect fabric of multi-core SoCs. But the performance requirements of(More)
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication fabrics can be significantly enhanced by introducing long-range, low power, high bandwidth direct links between far apart cores. In this paper a design methodology for a scalable(More)
The Network-on-Chip (NoC) paradigm has emerged as a scalable interconnection infrastructure for modern multi-core chips. However, with growing levels of integration, the traditional NoCs suffer from high latency and energy dissipation in on-chip data transfer due to conventional metal/dielectric based interconnects. Three-dimensional integration, on-chip(More)
The performance benefits of conventional Network-on-Chip (NoC) architectures are limited by the high latency and energy dissipation in long distance multihop communication between embedded cores. To alleviate these problems, wireless on-chip networks are envisioned. Using miniaturized on-chip antennas as an enabling technology, wireless NoCs (WiNoCs) can be(More)
Network-on-Chip architectures with various new emerging interconnect technologies offer unprecedented performance gain compared to their more conventional planar metal interconnect-based counterparts. A comparative analysis of these emerging NoCs will provide a better understanding towards adopting them in the mainstream design. This paper compares(More)
The performance benefits of conventional Network-on-Chip (NoC) architectures are limited by the high latency and energy dissipation in long distance multihop communication between embedded cores. This limitation of conventional NoC architectures can be addressed by introducing long-range, high bandwidth and low power wireless links between the distant(More)
Massive levels of integration are making modern multicore chips all pervasive in several domains. High performance, robustness, and energy-efficiency are crucial for the widespread adoption of such platforms. Networks-on-Chip (NoCs) have emerged as communication backbones to enable a high degree of integration in multicore Systems-on-Chip (SoCs). Despite(More)
(2012) Spectrum sensing optimisation for dynamic primary user signal. This work has been submitted to the IEEE for possible publication. Copyright may be transferred without notice, after which this version may no longer be accessible Notice: Changes introduced as a result of publishing processes such as copy-editing and formatting may not be reflected in(More)