Ket Chiew Sia

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This paper presents the architecture of Arria 10, a high-density FPGA family built on the TSMC 20SOC process. The design of the device includes an embedded dual-core 1.5 GHz ARM A9 subsystem with peripherals, more than 1M logic elements (LEs) and 1.7M user flip-flops, and 64Mb of embedded memory organized into configurable memory blocks. The Arria 10 family(More)
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