At-speed test has become a requirement in IC technologies below 180 nm. Unfortunately, test mode switching activity and IR-drop present special challenges to the successful application of structural at-speed tests. In this paper we characterize these problems on commercial ASICs in order to understand how to implement more effective solutions.
It is a well-known phenomenon that test power consumption may exceed that of functional operation. ICs have been observed to fail at specified minimum operating voltages during structured at-speed testing while passing all other forms of test. Methods exist to reduce power without dramatically increasing pattern volume for a given coverage. We present case… (More)
The SEMATECH " Test Methods Evaluation " study, Project Number S-121, is an experiment to determine the relative merits of several test methodologies often used by SEMAT-ECH member companies and other IC manufacturers. Conclusions drawn from the experiment thus far have indicated that each test methodology uniquely detects defects. This-experimentation and… (More)
—At-speed testing is becoming crucial for modern very-large-scale-integration systems, which operate at clock speeds of hundreds of megahertz. In a scan-based test methodology , it is common to use a transition delay fault model for at-speed testing. The launching of the transition can be done either in the last cycle of scan shift [launch-off-shift (LOS)],… (More)
For many years, non-target detection experiments have been simulated by using AND/OR bridges or gross delay faults as surrogates. For example, the defective part level can be estimated based upon surrogate detection when test patterns target stuck-at faults in the circuit. For the rst time, test pattern generation techniques that attempt to maximize… (More)
Variable ordering is critical in the efficient representation of functions as Ordered Binary Decision Diagrams (OBDDS). In this paper we present new heuris-tics to determine " good " variable orderings. We use a new representation form, Ordered Partial Decision Diagrams (OPDDs)~ to evaluate heuristically generated orders on large crccuits. Several improved… (More)