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As technology scales into the deep submicron regime, noise immunity is becoming a metric of comparable importance to area, timing, and power for the analysis and design of VLSI systems. This paper defines noise as it pertains to digital systems and addresses the technology trends which are bringing noise issues to the forefront. The noise sources which are(More)
The novel electronic properties of graphene, including a linear energy dispersion relation and purely two-dimensional structure, have led to intense research into possible applications of this material in nanoscale devices. Here we report the first observation of saturating transistor characteristics in a graphene field-effect transistor. The saturation(More)
—It is widely recognized that adaptive control of the power supply is one of the most effective variables to achieve energy-efficient computation. Most on-chip dc–dc conversion systems have relied on buck converters with off-chip LC filters. In this paper, we describe the development of a software controllable, fully integrated on-chip dc–dc downconversion(More)
—As technology scales into the deep submicron regime, noise immunity is becoming a metric of comparable importance to area, timing, and power for the analysis and design of very large scale integrated (VLSI) systems. A metric for noise immunity is defined, and a static noise analysis methodology based on this noise-stability metric is introduced to(More)
We describe the design and implementation of a continuous-time finite-impulse-response processor chain, which includes a six-bit asynchronous ADC, an asynchronous digital core and an eight-bit asynchronous DAC designed in TSMC 0.25 /spl mu/m technology. Continuous-time operation avoids aliasing and the quantization noise associated with the aliasing of(More)
—This paper presents a new approach to global clock distribution in which tree-driven grids are augmented with on-chip spiral inductors to resonate the clock capacitance. In this scheme, the energy of the fundamental frequency resonates between electric and magnetic forms, with the reduced admittance of the clock network allowing for significantly lower(More)
Small transistors necessitate big changes, in the way digital circuits are modeled and optimized for manufacturability, and new strategies for logic, memory, clocking and power distribution. ABSTRACT | Well-designed circuits are one key Binsulating[ layer between the increasingly unruly behavior of scaled complementary metal–oxide–semiconductor devices and(More)