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Reversible logic circuits are of interests to power minimization having applications in low power CMOS design, optical information processing, DNA computing, bioinformatics, quantum computing and nanotechnology. In this paper we propose a novel 4x4 bit reversible multiplier circuit. The proposed reversible multiplier is faster and has lower hardware(More)
In this paper, we introduce two new 4-moduli sets and for developing efficient large dynamic range (DR) residue number systems (RNS). These moduli sets consist of simple and well-formed moduli which can result in efficient implementation of the reverse converter as well as internal RNS arithmetic circuits. The moduli set has -bit DR and it can result in a(More)
In this paper, an efficient design of the residue to binary converter for the new moduli set {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>2n+1</sup>-1} based on mixed-radix conversion (MRC) is presented. The moduli set {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>2n+1</sup>-1} is obtained by enhancing one of the moduli of the recently introduced moduli set(More)
Reversible computation plays an important role in the synthesis of circuits having application in quantum computing, low power CMOS design, bioinformatics and nanotechnology-based systems. Conventional logic circuits are not reversible. A reversible circuit maps each input vector, into a unique output vector and vice versa. We demonstrate how the well-known(More)
This paper presents a novel low-power majority function-based 1-bit full adder that uses MOS capacitors (MOSCAP) in its structure. It can work reliably at low supply voltage. In this design, the timeconsuming XOR gates are eliminated. The circuits being studied are optimized for energy efficiency at 0.18-mm CMOS process technology. The adder cell is(More)