Kei Masuko

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Elmore delay has been widely used as an analytical estimate of interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. However, for typical RLC interconnections with ramp input, Elmore delay can deviate by up to 100% or more from SPICE-computed delay since it is independent of rise time of the input ramp signal. We(More)
Elmore delay has been extensively used for interconnect delay estimation because its simplicity of evaluation makes it appropriate for layout design. However, since Elmore delay does not take into account the eeect of inductance, the discrepancy between actual delay and Elmore delay becomes signiicant for long RLC transmission lines, such as for MCM and PCB(More)
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