A major challenge of software-defined radio (SDR) is to realize many giga operations per second of flexible baseband processing within a power budget of only a few hundred mW. A heterogeneous hardware architecture with the programmable vector processor EVP as key component can support WLAN, UMTS, and other standards. A detailed rationale for the EVP… (More)
This paper describes how to extend the performance of a highly energy efficient general purpose DSP by generating accelerators using C-level algorithm descriptions. The result is an equally energy efficient, economical implementation of that algorithm or algorithms.