Kaushal K Singh

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Nanocrystal (NC) based memory devices are considered a possible alternative for floating gate (FG) replacement below 30nm node. In this work, endurance reliability of Pt NC devices is investigated for single layer (SL) and dual layer (DL) structures. The degradation in the devices due to Program/Erase (P/E) stress is investigated. Relative improvement in(More)
Memory window (MW) and the retention of single-layer (SL) and dual-layer (DL) platinum (Pt) nanocrystal (NC) devices are extensively studied before and after program/erase (P/E) cycling. DL devices show better charge storage capability and reliability over the SL devices. Up to 50% improvement in the stored charge is estimated in the DL device over SL when(More)
In this letter, we report metal nanocrystal (NC)-based Flash memory devices with single-layer (SL) and dual-layer (DL) Pt NCs as the storage element. The devices are fabricated using CMOS compatible process flow with optimized low-leakage high-k Al2O3 as the control dielectric. Large memory window (10 V for SL and 15 V for DL devices) is observed due to(More)
Most of the current high-density Flash cells use multilevel-cell (MLC) technology to store 2-bits/cell to increase memory density. In this work, dual layer metal nanocrystal (NC) flash EEPROM device, with large memory window, good retention and 10 cycle endurance is reported. High-temperature retention, gate bias accelerated retention, read disturb and(More)
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