Katsumi Dosaka

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Ternary CAMs (TCAMs) are becoming increasingly important for realizing networking applications such as address classification or packet filtering. Unfortunately, conventional static TCAMs have three critical problems to be addressed: (i) large chip size, (ii) high power dissipation, and (iii) low yield caused by the lack of an efficient redundancy(More)
SUMMARY This paper describes a novel TCAM architecture designed for enhancing the soft-error immunity. An associated embedded DRAM and ECC circuits are placed next to TCAM macro to implement a unique methodology of recovering upset bits due to soft errors. The proposed configuration allows an improvement of soft-error immunity by 6 orders of magnitude(More)