Katarina Jelemenska

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Power consumption is becoming the key aspect in modern digital systems design. The current low-power design flow involves the application of some power-reduction techniques in an RTL (Register Transfer Level) or lower-level model. This paper describes a novel methodology for low-power design flow that supplements the existing one. It proposes an abstract(More)
This document contains a short summary of results, achieved using the alternative skills assessment system developed for Mobile Education Center. The system was designed as client-server application and can be used for automated examination of practical skills and knowledge in the area of digital systems design and modelling using VHDL. The communication in(More)
Digital systems have become increasingly common in recent years. This fact accompanied by ever growing complexity of contemporary digital systems puts the new and stringent requirements on the education in this field. In order to be able to keep pace with technological innovations and changes, the future digital designers not only have to be skillful in the(More)
Nowadays the digital systems design is almost exclusively realized using hardware description languages (HDL). In Europe, the VHDL (Very-High-Speed Integrated Circuits HDL) is the most widely used HDL. Although HDLs brought a lot of advantages into the design process, the HDL structural models, especially on register transfer and lower layers, are harder to(More)
Hardware description languages (HDLs) can describe a digital system at several layers of abstraction, typically starting at register transfer level (RTL). Due to the instant growth in the modern designs complexity, there is an urgent need to specify the system at the more abstract layer, the system layer. The paper deals with the problem of transformation(More)