Karl-Heinz Sulanke

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Application-driven computers for lattice gauge theory simulations have often been based on system-on-chip designs, but the development costs can be prohibitive for academic project budgets. An alternative approach uses compute nodes based on a commercial processor tightly coupled to a custom-designed network processor. Preliminary analysis shows that this(More)
QPACE is a novel parallel computer which has been developed to be primarily used for lattice QCD simulations. The compute power is provided by the IBM PowerXCell 8i processor, an enhanced version of the Cell processor that is used in the Playstation 3. The QPACE nodes are interconnected by a custom, application optimized 3-dimensional torus network(More)
This paper is a slightly modified and reduced version of the proposal of the apeNEXT project, which was submitted to DESY and INFN in spring 2000. It presents the basic motivations and ideas of a next generation lattice QCD (LQCD) computing project, whose goal is the construction and operation of several large scale Multi-TFlops LQCD engines, providing an(More)
The software environment used to control a large switching architecture based on SGS-Thomson STC104 (an asynchronous 32-way dynamic packet routing chip) is presented. We are evaluating this switching technology for large scale, real-time parallel systems. A Graphical User Interface (GUI) written as a multi-thread application in Java allows to set the switch(More)
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