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Short term threshold instabilities may cause erratic behavior in analog circuits like comparators and analog-to-digital-converters. As conventional characterization procedures have not been appropriately sensitized to such issues, this kind of erratic behavior usually only occurs in products where it is very difficult to identify. Therefore, for example(More)
— An accurate understanding of oxide traps is essential for a number of reliability issues, including the bias temperature instability, hot carrier degradation, time-dependent dielectric breakdown, random telegraph and 1/f noise. Recent results have demonstrated that hole capture and emission into oxide traps in pMOS transistors are more complicated than(More)
Given the rapid recovery of the degradation induced by bias-temperature stress, the understanding and modeling of NBTI has been a challenge for nearly half a century. With the introduction of the time-dependent defect spectroscopy (TDDS), NBTI could be studied at the single defect level, confirming that it is dominated by a collection of first-order(More)
Keywords: Hot-carrier Degradation (HCD) Negative bias temperature instability (NBTI) Recovery Capture emission time maps Stress voltage matrix Drift minimum a b s t r a c t We present measurement results in form of threshold voltage drift plots, recovery traces and continuous capture emission time maps (CET maps) including Negative Bias Temperature(More)
In order to identify the physical mechanisms behind the negative bias temperature instability (NBTI), the time-dependent defect spectroscopy (TDDS) has been recently proposed. The TDDS takes advantage of the fact that in nano-scaled devices only a handful of defects are present. As a consequence, degradation and recovery proceed in discrete steps, each of(More)
The physical origin of both Negative-and Positive Bias Temperature Instability (N-/PBTI) is still unclear and under debate. We analyzed the rarely studied recovery behavior after PBTI stress in pMOSFETs and compared it with NBTI data obtained from the same technology. While recovery after short stress times is consistent with the previously reported(More)
—We propose a new method to determine the lateral position of border traps in MOSFETs. The approach is based on the dependence of the trap-induced threshold voltage shift on the drain bias which is sensitive to the trap position. This follows from the results obtained with both technology computer aided design (TCAD) simulations and with a compact model.(More)
Detailed time-dependent defect spectroscopy (TDDS) studies have recently demonstrated that recovery following negative bias temperature stress in MOSFETs is to good approximation consistent with a collection of independent (effective) first-order reactions. While the data are largely consistent with the first-order picture, several `anomalies' such as(More)