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A self-calibrated two-point delta-sigma modulation technique for CMOS RF transmitter is proposed. This calibration technique employs voltage-controlled oscillator (VCO) and delta-sigma modulator input ports in a frequency synthesizer. By monitoring the control voltage of a loop filter, the gain mismatch between two paths can be detected and completely(More)
A dual-mode RF receiver with low-IF architecture has been developed for L1-band GPS and Galileo in a 0.18 mum CMOS process. The channel selecting bandpass filter centered at 4.092 MHz has programmable bandwidth (2MHz, 4 MHZ, and 6 MHz), which allows the reception of GPS and Galileo signals. A fractional-N phase locked loop generates local oscillator,(More)
In this paper, class-E power amplifier (PA) with automatic power control loop and load compensation circuit is presented. The transmitted power is controlled by adjusting the signal applied to the gate of the power control transistor. In addition, a parallel capacitor is also controlled to enhance the efficiency and compensate for the load variation. This(More)