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Reconfigurablele optical interconnects enable flexible and high-performance communication in multi-chip architectures to be arbitrarily adapted, leading to efficient parallel signal processing. The use of Opto-VLSI processors as beam steerers and multicasters for reconfigurable inter-chip optical interconnection is discussed. We demonstrate, as(More)
In this paper, a high-speed reconfigurable card-to-card optical interconnect architecture based on hybrid free-space and multi-mode fiber (MMF) propagation is proposed. The use of free-space signal transmission provides flexibility and reconfigurability and the MMF extends the achievable interconnection range. A printed-circuit-board (PCB) based integrated(More)
In this paper, we propose and experimentally demonstrate a free-space based high-speed reconfigurable card-to-card optical interconnect architecture with broadcast capability, which is required for control functionalities and efficient parallel computing applications. Experimental results show that 10 Gb/s data can be broadcast to all receiving channels for(More)
We propose an optical wireless communication network architecture employing an all-optical central communication unit and optical transceiver units. The network can easily be installed when communication network facilities are partially damaged by a disaster. The network performance is simulated at 1Gbit/s, over 1km under different weather conditions.
In this paper, we experimentally demonstrate a high-speed free-space reconfigurable card-to-card optical interconnect architecture employing MEMS-based steering mirror arrays for simple and efficient link selection. A printed-circuit-board (PCB) based interconnect module is developed and 3 × 10 Gb/s reconfigurable card-to-card optical interconnect with a(More)
In this paper we propose and experimentally demonstrate a reconfigurable 10Gbps frequency-encoded (1D) encoder/decoder structure for optical code division multiple access (OCDMA). The encoder is constructed using a single semiconductor optical amplifier (SOA) and 1D reflective Opto-VLSI processor. The SOA generates broadband amplified spontaneous emission(More)
We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg(More)
In this paper, we investigate the impact of the most common catastrophic and parametric faults in photonic systems. We demonstrate, using the example of a photonic correlator, the effectiveness of testing techniques for fault detection in photonic systems. To the best of our knowledge, this constitutes the first attempt to define a fault model and to(More)
In this paper, we propose and experimentally demonstrate reconfigurable card-to-card optical wireless interconnects architecture with 16-Carrierless-Amplitude/Phase modulation. Results show that 3×40 Gb/s interconnection is achieved with 2 mW transmission power.