K. Mayaram

Publications214
h-index31
Citations4,124
Highly Influential Citations201
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  • Publications
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Efficient Far-Field Radio Frequency Energy Harvesting for Passively Powered Sensor Networks
TLDR
An RF-DC power conversion system is designed to efficiently convert far-field RF energy to DC voltages at very low received power and voltages. Expand
  • 675
  • 33
  • PDF
Piezoelectric micro-power generation interface circuits
TLDR
New power conversion circuits to interface to a piezoelectric micro-power generator have been fabricated and tested. Expand
  • 238
  • 18
A Digital PLL With a Stochastic Time-to-Digital Converter
TLDR
A new dual-loop digital phase-locked loop (DPLL) architecture is presented. Expand
  • 117
  • 11
  • PDF
A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy
TLDR
In this brief, a systematic design procedure for a second-order all-digital phase-locked loop (PLL) is proposed. Expand
  • 132
  • 9
  • PDF
A 475 mV, 4.9 GHz Enhanced Swing Differential Colpitts VCO With Phase Noise of -136 dBc/Hz at a 3 MHz Offset Frequency
TLDR
A new enhanced swing differential Colpitts VCO architecture enables oscillations to go beyond both the supply voltage and ground making it suitable for low voltage operation. Expand
  • 48
  • 9
Analog integrated circuits for communication - principles, simulation and design
TLDR
Analog Integrated Circuits for Communication: Principles, Simulation and Design, Second Edition covers the analysis and design of nonlinear analog integrated circuits that form the basis of present-day communication systems. Expand
  • 91
  • 8
  • PDF
Method for a Constant Loop Bandwidth in LC-VCO PLL Frequency Synthesizers
TLDR
The proposed PLL employs an averaging varactor based split-tuned LC-VCO and a servo loop which sets the charge-pump current to be inversely proportional to the square of oscillation frequency. Expand
  • 82
  • 7
Analysis of charge-pump phase-locked loops
TLDR
In this paper, we present an exact analysis for third-order charge-pump phase-locked loops using state equations. Expand
  • 172
  • 6
  • PDF
A scalable substrate noise coupling model for design of mixed-signal IC's
TLDR
This paper describes a design-oriented scalable macromodel for substrate noise coupling in heavily-doped substrates. Expand
  • 116
  • 6
A comprehensive geometry-dependent macromodel for substrate noise coupling in heavily doped CMOS processes
TLDR
An accurate substrate noise coupling macromodel for heavily doped CMOS processes is presented. Expand
  • 46
  • 6
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