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On the beneficial impact of tensile-strained silicon substrates on the low-frequency noise of n-channel metal-oxide-semiconductor transistors
The low-frequency noise in n-channel metal-oxide-semiconductor field-effect transistors, fabricated on strained silicon (SSi) substrates has been investigated and compared with the results obtainedExpand
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Technology Assessment of Through-Silicon Via by Using $C$ – $V$ and $C$ – $t$ Measurements
C-V characteristics of through-silicon vias (TSVs) manufactured in two different processing lines are compared to demonstrate the reproducibility of the TSV process module in terms of the minimum TSVExpand
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Effect of the Ge-molefraction on the subthreshold slope and leakage current of vertical Si/Si1−xGex MOSFETs
Abstract The effect of the Ge-concentration on the subthreshold behaviour of vertical Si/Si 1− x Ge x pMOSFETs and of complementary Si 1− x Ge x /Si nMOSFETs is investigated by using an analyticalExpand
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CMOS-Integrated Poly-SiGe Piezoresistive Pressure Sensor
An integrated poly-SiGe-based piezoresistive pressure sensor, which is directly fabricated above 0.13 m Cu-back-end CMOS technology, is presented. This represents not only the first integratedExpand
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Successful Selective Epitaxial Si1 − x Ge x Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications
Si 1-x Ge x /Si heterostructures are useful for numerous device applications where device performance is improved by band offsets and/or increased carrier mobility. The use of selective epitaxialExpand
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MOSFETs Scaling Down: Advantages and Disadvantages for High Temperature Applications
With technology advances into deep submicron era, new physical phenomena appear and the relative importance of existing phenomena for high-temperature behaviour can change. This paper is focused onExpand
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High hole-mobility 65nm biaxially-strained Ge-pFETs: fabrication, analysis and optimization
1. Abstract: For the first time, high hole-mobility 65nm biaxially-strained Ge-pFETs, with reduced EOT while maintaining minimized SCE, have been fabricated and electrically characterized in-depthExpand
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Performance improvement in narrow MuGFETs by gate work function and source/drain implant engineering
Abstract At short gate lengths, narrow multiple-gate FETs (MuGFETs) are known to offer superior short channel effect (SCE) control than their bulk Si counterpart [Doyle BS et al. High performanceExpand
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Flatband voltage shift of ruthenium gated stacks and its link with the formation of a thin ruthenium oxide layer at the ruthenium/dielectric interface
A systematic study about the flatband voltage (Vfb) shift of Ru gated metal-oxide-semiconductor stacks after thermal treatment in O2 has been performed. The dependence of the Vfb shift on the annealExpand
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Defect analysis of strained silicon on thin strain-relaxed buffer layers for high mobility transistors
The electrical activity of defects present in strained silicon (SSi) on thin strain-relaxed Si1−xGex buffer layers (SRBs) is evaluated using deep submicron CMOS compatible n+/p and p+/n shallowExpand
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