K.-Y. Lin

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A noise optimization formulation for a CMOS low-noise amplifier (LNA) with on-chip low-Q inductors is presented, which incorporates the series resistances of the on-chip low-Q inductors into the noise optimization procedure explicitly. A 10-GHz LNA is designed and implemented in a standard mixed-signal/RF bulk 0.18-/spl mu/m CMOS technology based on this(More)
This paper describes the design of millimeter-wave wide-band monolithic GaAs passive high electron-mobility transistor (HEMT) switches using the traveling-wave concept. This type of switch combined the off-state shunt transistors and series microstrip lines to form an artificial transmission line with 50-/spl Omega/ characteristic impedance. A 15-80-GHz(More)
A new transmission-line concept, called the field-effect transistor (FET)-integrated coplanar waveguide (CPW), is proposed. This concept treats the passive two-finger FET as CPW and, thus, the scaling rule is more accurate than the previous model, especially in high frequency. The extraction approach of the parameters of the FET-integrated CPW is also(More)
A low insertion-loss single-pole double-throw switch in a standard 0.18-/spl mu/m complementary metal-oxide semiconductor (CMOS) process was developed for 2.4- and 5.8-GHz wireless local area network applications. In order to increase the P/sub 1dB/, the body-floating circuit topology is implemented. A nonlinear CMOS model to predict the switch power(More)
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