K. N. Chiang

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The demands for electronic packages with lower profile, lighter weight, and higher input/ output (I/O) density have led to rapid expansion in flip chip, chip scale package (CSP) and wafer level packaging (WLP) technologies. The urgent demand high I/O density and good reliability characteristics have led to the evolution of ultra high-density non-solder(More)
A novel chip-on-metal structure of the advanced wafer level chip scale package (WLCSP) which has the capability of redistributing the electrical circuit is proposed in this study. In the WLCSP, the solder on rubber (SOR) design expands the chip area and also provides a buffer layer for the deformation energy from the coefficient of thermal expansion (CTE)(More)
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