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In this paper low power full adder using 11 transistors has been proposed. The main idea of design is based on improving the performance of 10 transistor full adder design mentioned in literature by sacrificing a transistor count. While the proposed circuit has negligible area overhead, it has remarkably improved power consumption and temperature(More)
Length of interconnect and number of repeaters are increasing with the advancement in VLSI Technology. Requirement of repeaters is increasing as the length of interconnect is increasing. The power delay product and frequency of operation plays significant role in designing of repeater. Performance of earlier conventional repeater with the proposed(More)
Domestication of tomato has resulted in large diversity in fruit phenotypes. An intensive phenotyping of 127 tomato accessions from 20 countries revealed extensive morphological diversity in fruit traits. The diversity in fruit traits clustered the accessions into nine classes and identified certain promising lines having desirable traits pertaining to(More)
This paper proposes a new design of 2T AND gate. All the designs are compared with respect to the transistor count, power consumption, temperature sustain ability, noise immunity and parasitic capacitance in order to prove the superiority of proposed design over existing designs. The pre layout simulation has been carried out on BSIM3v3 90nm technology and(More)
This paper proposes a new design of pass transistor logic based 2T AND gate. Performance comparison of proposed gate with traditional CMOS, complementary pass-transistor logic design and GDI techniques is presented. Different methods have been compared with respect to the number of devices, power-delay product, temperature sustainability and noise immunity(More)
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