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We present a 45-nm SOI CMOS technology that features: i) aggressive ground-rule (GR) scaling enabled by 1.2NA/193nm immersion lithography, ii) high-performance FET response enabled by the integration of multiple advanced strain and activation techniques, iii) a functional SRAM with cell size of 0.37mum<sup>2</sup>, and iv) a porous low-k (k=2.4) dielectric(More)
We present a fully-integrated SOI CMOS 22nm technology for a diverse array of high-performance applications including server microprocessors, memory controllers and ASICs. A pre-doped substrate enables scaling of this third generation of SOI deep-trench-based embedded DRAM for a dense high-performance memory hierarchy. Dual-Embedded stressor technology(More)
Beta-mannosidosis is an autosomal recessive lysosomal storage disease resulting from a deficiency of the lysosomal enzyme beta-mannosidase. The clinical manifestations of this disease in reported human cases are very heterogeneous ranging from relatively mild to moderately severe. This is in contrast with the severe prenatal onset seen in ruminant(More)
A high performance embedded DRAM with deep trench capacitor and high performance SOI logic has been deployed in 45nm and 32nm technology nodes. Following a yield ramp of the sub-2ns latency 45nm technology, we present, for the first time, a 32nm eDRAM technology fully compatible with high performance logic with high-&#x043A; metal gate access transistor and(More)
This work demonstrates that the ~2times mobility advantage of (110) PMOS over (100) PMOS is maintained down to 190 nm liners poly-pitch for devices under compressive stress. (110) PMOS with 3.5 GPa compressively stressed liners demonstrate strong channel drives with I<sub>on</sub>=800 muA/mum at I<sub>off</sub>=100 nA/mum (V<sub>dd</sub>=10 V) for 190 nm(More)
This paper presents for the first time (110) PMOS characteristics without R<sub>ext</sub> degradation, allowing investigation of fundamental mobility and demonstration of drive current I<sub>on</sub> in excess of 1mA/mum at I<sub>off</sub> =100 nA/&#x003BC;m.
gate-first 22-nm SOI technology with embedded DRAM G. Freeman P. Chang E. R. Engbrecht K. J. Giewont D. F. Hilscher M. Lagus T. J. McArdle B. Morgenfeld S. Narasimha J. P. Norum K. A. Nummy P. Parries G. Wang J. K. Winslow P. Agnello R. Malik IBM’s high-performance 22-nm silicon-on-insulator (SOI) technology is the enabling physical foundation of IBM(More)
This paper presents the industry's smallest Embedded Dynamic Random Access Memory (eDRAM) implemented in IBM's 22nm SOI technology. The bit cell area of 0.026&#x03BC;m<sup>2</sup> achieves ~60% scaling over the previous generation with deep trench (DT) capacitance optimized for performance and retention requirements. We report, for the first time, the(More)
For reasons that are not obvious, sets of related plasmid-like elements that consist of short segments of DNA that overlap the 5' terminal region of the mitochondrial large-subunit rRNA gene sometimes appear spontaneously and become amplified in the mitochondria of some cytochrome-deficient and/or UV-sensitive mutants of Neurospora crassa. These elements(More)