Junmin Jiang

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Reducing the supply voltage of digital circuits to the sub- or near-threshold regions minimizes dynamic power consumption and achieves better efficiency [1]. This technique is widely used in energy-efficient applications, and is especially beneficial for wirelessly powered devices such as wearable electronics, biomedicai implants and smart sensor networks.(More)
Inspired by The Square of Vatican City, a fully integrated step-down switched-capacitor DC-DC converter ring with 100+ phases is designed with a fast dynamic voltage scaling (DVS) feature for the microprocessor in portable or wearable devices. As shown in Fig. 20.4.1, this symmetrical ring-shaped converter surrounds its load in the square and supplies the(More)
This paper presents a systematic analysis of integrated 3-level buck converters under both ideal and real conditions as a guidance for designing robust and fast 3-level buck converters. Under ideal conditions, the voltage conversion ratio, the output voltage ripple and, in particular, the system's loop-gain function are derived. Design considerations for(More)
Multicore application processors in smartphones/watches use power-saving techniques such as dynamic voltage and frequency scaling (DVFS) to extend battery cycle, and supply cores with different voltages [1]. High-efficiency fully integrated switched-capacitor (SC) power converters with no external components are promising candidates [2]. Typically, SC(More)
A digitally controlled 2-/3-phase 6-ratio switched-capacitor (SC) DC-DC converter with low output voltage ripple and high efficiency is presented. Operating with a wide input voltage range of 1.6V to 3.3V, this SC converter can deliver a maximum power of 250mW to an output of 0.5V to 3V. Six voltage conversion ratios (VCRs) can be generated with only 2(More)
Wireless Local Area Network (WLAN) offloading is an important approach to address the data traffic challenge faced by Long Term Evolution (LTE) network. Legacy offloading solutions based on the core network suffer from the limitations of load unbalance and user experience degradation. To solve this problem, 3GPP has recently proposed a radio access network(More)
This paper presents a low power bandgap reference (BGR) with 573 mV average output voltage and 0.95-V minimum supply voltage. Here, the resistor ratio of two types of resistors that have opposite temperature coefficient (TC) realizes a second-order curvature compensation. In addition, to reduce the supply voltage we adopt a voltage divider, and we also(More)
This paper presents an energy-efficient visible light communication (VLC) receiver SoC that utilizes ambient light rejection and post-equalization techniques for emerging LiFi applications. Based on ordinary phosphorescent white LEDs, a 24-Mb/s IEEE 802.15.7-compliant LiFi link is demonstrated over 1.6 m with a BER below 10<sup>&#x2212;9</sup>.
A theoretical analysis of two-phase fully-on-chip step-down switched-capacitor DC-DC converters is presented. It is based on a universal model of calculating the output voltage and the efficiency of converters with conversion ratios (N-l)/N. Both the top- and bottom-plate parasitic capacitors of each flying capacitors are included. Simulation results show(More)