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Network-on-Chip (NoC) has been proposed as a new solution to deal with the global communication problem of complex System-on-Chip (SoC), which faces huge design challenges. A performance evaluation tool is essential for designers to explore the design space, verify functionality and estimate performance of designs. This paper presents a performance(More)
—Fast and accurate full-system simulation is needed for MPSoC design space exploration to achieve tight time-to-market design goals. In the field of full-system simulation , transaction level modeling with SystemC and traditional instruction set simulators (e.g. M5) based on C/C++ have their own advantages, separately. In this paper, a novel method for(More)
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