Julien Eydoux

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We will explore how processing power of LEON3 processor can be enhanced by connecting small commercially available embedded FPGA (eFPGA) IP with the processor. We will analyze integration of eFPGA with LEON3 in two ways, inside the processor pipeline and as a co-processor. The enhanced processing power helps to reduce dynamic power consumption by Dynamic(More)
The need of non volatility along with the added flexibility of un limited reprogramming like SRAM has lead to the concept of universal memories. MRAM (Magnetoresistive Random Access Memory) is one prominent member of them. At present only Flash is providing a limited bridge for that. Flash based FPGAs have several benefits being non volatile but(More)
Power consumption has become the biggest challenge in industry for chip design. We will present that by using small reprogrammable embedded FPGAs (eFPGA) coupled with a processor we can achieve power and energy reduction with a very small silicon overhead. Enhancement of computational power helps lowering down frequency (dynamic frequency scaling) to(More)
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