Juan Pablo Martinez Brito

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A software-defined radio (SDR) is a wireless communication device in which all of the signal processing is implemented in software. By simply downloading a new program, a SDR is able to interoperate with different wireless protocols, incorporate new services, and upgrade to new standards. Therefore, FPGAs have been used extensively for implementing(More)
Errors caused by tolerance variations and mismatches among components severely degrade the performance of integrated circuits. These random effects in process parameters significantly impact manufacture costs by decreasing yield and so by including extra-circuits for adjustment. In this paper we propose a design methodology based on the Pelgrom’s MOS(More)
Radio Frequency Identification (RFID) systems are widely used in a variety of tracking, security and tagging applications. In this context, passive low-frequency (LF) RFID systems have a large installed base, mostly used for animal tagging and supply chain applications. This paper presents a Low-Power/Low-Voltage analog front-end architecture (AFE) for such(More)
Component tolerances and mismatches due to process variations severely degrade the performance of bandgap reference (BGR) circuits. In this paper, we describe the design of a BGR considering the Pelgrom’s mismatch model. The main purpose of our methodology is to convey the design to reach a good trade-off between area and mismatch. Implemented in standard(More)
This paper presents a low power, low voltage RF/analog front-end architecture for LF RFID tags with a dynamic power sensing scheme. The front-end converts the incoming RF power into DC using a system that adjusts its performance according to the available RF power. The power sensing scheme, composed by a feedback system that “regulates” the RF clamp stage,(More)
This paper describes the architecture of a Power Management system for low-frequency passive RFID tags in a standard CMOS 0.18um technology. Passive tags have no internal power source but use the incoming RF energy transmitted by a reader to power all the circuitry inside them via a rectifier. Due to the wide variation of the rectified voltage, two stages(More)
This paper presents the design of a CMOS sub-1V voltage reference using a 2-transistor Self-Cascode MOSFET structure able to get low power consumption, temperature compensation, and small area. An efficient design procedure applied to this simple topology relying on NMOS transistors with different threshold voltages allows attaining large immunity against(More)
This paper presents an overview of the capabilities and different architectures for integrated temperature sensors in RFID tags using CMOS technology. A feasibility study for the integration of temperature sensors in RFID tags is described. The study focuses on four topologies to make temperature measurements and compare them regarding power, temperature(More)
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