Joshua Friedrich

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for higher frequency at fixed power V. Zyuban S. A. Taylor B. Christensen A. R. Hall C. J. Gonzalez J. Friedrich F. Clougherty J. Tetzloff R. Rao The IBM POWER7+i microprocessor is the next-generation IBM POWERA processor implemented in IBM’s 32-nm silicon-on-insulator process. In addition to enhancing the chip functionality, implementing core-level and(More)
POWER5 offers significantly increased performance over previous POWER designs by incorporating simultaneous multithreading, an enhanced memory subsystem, and extensive RAS and power management support. The 276M transistor processor is implemented in 130nm silicon-on-insulator technology with 8-level of Cu metallization and operates at >1.5 GHz.
Timing uncertainty in microprocessors is comprised of several sources including PLL jitter, clock distribution skew and jitter, across chip device variations, and power supply noise. The on-chip measurement macro called SKITTER (SKew+jITTER) was designed to measure timing uncertainty from all combined sources by measuring the number of logic stages that(More)
The IBM POWER6e microprocessor is a high-frequency (.5-GHz) microprocessor fabricated in the IBM 65-nm silicon-on-insulator (SOI) complementary metal-oxide semiconductor (CMOS) process technology. This paper describes the circuit, physical design, clocking, timing, power, and hardware characterization challenges faced in the pursuit of this industry-leading(More)