José Silva-Martínez

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This paper proposes a solution to the present bulky external capacitor low-dropout (LDO) voltage regulators with an external capacitorless LDO architecture. The large external capacitor used in typical LDOs is removed allowing for greater power system integration for system-on-chip (SoC) applications. A compensation scheme is presented that provides both a(More)
A low-noise amplifier (LNA) that achieves high third-order input intercept point (IIP3) at RF frequencies using a nonlinearity cancellation technique is proposed. The circuit tackles the problem of the effect of the second-order nonlinearity on IIP3 at RF frequencies. The circuit functionality is analyzed using Volterra series. The linear LNA was designed(More)
A stable low dropout (LDO) voltage regulator topology for low equivalent series resistance (ESR) capacitive loads is presented. The proposed scheme generates a zero internally instead of relying on the zero generated by the load capacitor and its ESR combination for stability. It is demonstrated that this scheme realizes robust frequency compensation,(More)
A full CMOS seventh-order linear phase filter based on – biquads with a 3-dB frequency of 200 MHz is realized in 0.35m CMOS process. The linear operational transconductance amplifier is based on complementary differential pairs in order to achieve both low-distortion figures and high-frequency operation. The common-mode feedback (CMFB) employed takes(More)
A technique to enhance the linearity of continuous-time operational transconductance amplifiers (OTA)-C filters working at high frequencies is proposed. Each OTA consumes 10.5 mW and the transconductance can be tuned from 70 to 160 A/V while the IM3 remains below 70 dB up to 50 MHz for a 1.3-Vpp differential input. For a 20-MHz low-pass second-order filter(More)
A 330-MHz fifth-order – continuous-time lowpass filter with 24-dB boost is presented. Existing solutions are found to be unsuitable for low-power, wide-band, and high-boost operation. The proposed solution realizes two symmetric real axis zeros by efficiently combining transfer functions associated with all nodes of cascaded biquad cells. Application of(More)
Low-power, small-area, 20MHz-BW ADCs that can be integrated in nanoscale CMOS technologies are of immense interest to the wireless communication industry. Implementation of high-performance analog circuits in nanometric technologies faces several challenges [1]. Time-domain digital signal processing (TDSP) [2] can be used as an alternative for some analog(More)
A 2.3V CMOS 80-200MHz 4-order continuous-time 0.05 equiripple linear phase filter with an automatic frequency tuning system is presented. An Operational Transconductance Amplifier (OTA) based on transistors operating in triode region is used to achieve a very wide linear input range and a wide transconductance tuning range. A system that integrates(More)