Learn More
—This paper proposes a solution to the present bulky external capacitor low-dropout (LDO) voltage regulators with an external capacitorless LDO architecture. The large external capac-itor used in typical LDOs is removed allowing for greater power system integration for system-on-chip (SoC) applications. A compensation scheme is presented that provides both(More)
This paper presents an analog built-in testing (BIT) architecture and its implementation. It enables the frequency response and harmonic distortion characterizations of an integrated device-under-test (DUT) through a digital off-chip interface. External analog instrumentation is avoided, reducing test time and cost. The proposed on-chip testing scheme uses(More)
A low-noise amplifier (LNA) that achieves high third-order input intercept point (IIP3) at RF frequencies using a nonlinearity cancellation technique is proposed. The circuit tackles the problem of the effect of the second-order nonlinearity on IIP3 at RF frequencies. The circuit functionality is analyzed using Volterra series. The linear LNA was designed(More)
—In this paper, a CMOS on-chip sensor is presented to detect dielectric constant of organic chemicals. The dielectric constant of these chemicals is measured using the oscillation frequency shift of an LC voltage-controlled oscillator (VCO) upon the change of the tank capacitance when exposed to the liquid. To make the system self-sustained, the VCO is(More)
—A stable low dropout (LDO) voltage regulator topology for low equivalent series resistance (ESR) capacitive loads is presented. The proposed scheme generates a zero internally instead of relying on the zero generated by the load capacitor and its ESR combination for stability. It is demonstrated that this scheme realizes robust frequency compensation,(More)
—The design and implementation of a fully integrated complementary metal–oxide–semiconductor (CMOS) sixth-order 2.4 Hz low-pass filter (LPF) for medical applications is presented. For the implementation of large-time constants both linearized operational transconductance amplifiers with reduced transcon-ductance and impedance scalers schemes for grounded(More)
—A technique to enhance the linearity of continuous time operational transconductance amplifiers (OTA)-C filters working at high frequencies is proposed. Each OTA consumes 10.5 mW and the transconductance can be tuned from 70 to 160 A/V while the IM3 remains below 70 dB up to 50 MHz for a 1.3-V pp differential input. For a 20-MHz low-pass second-order(More)
—A pseudo-differential fully balanced fully symmetric CMOS operational transconductance amplifier (OTA) architecture with inherent common-mode detection is proposed. Through judicious arrangement, the common-mode feedback circuit can be economically implemented. The OTA achieves a third harmonic distortion of 43 dB for 900 mV pp at 30 MHz. The OTA,(More)