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- José-Alejandro Piñeiro, Stuart F. Oberman, Jean-Michel Muller, Javier D. Bruguera
- IEEE Transactions on Computers
- 2005

A table-based method for high-speed function approximation in single-precision floating-point format is presented in this paper. Our focus is the approximation of reciprocal, square root, square root reciprocal, exponentials, logarithms, trigonometric functions, powering (with a fixed exponent p), or special functions. The algorithm presented here combines… (More)

- José-Alejandro Piñeiro, Javier D. Bruguera
- IEEE Trans. Computers
- 2002

A new method for the high-speed computation of double-precision floating-point reciprocal, division, square root, and inverse square root operations is presented in this paper. This method employs a second-degree minimax polynomial approximation to obtain an accurate initial estimate of the reciprocal and the inverse square root values, and then performs a… (More)

- José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
- IEEE Transactions on Computers
- 2004

An architecture for the computation of logarithm, exponential, and powering operations is presented in this paper, based on a high-radix composite algorithm for the computation of the powering function (X/sup Y/). The algorithm consists of a sequence of overlapped operations: 1) digit-recurrence logarithm, 2) left-to-right carry-free (LRCF) multiplication,… (More)

- José-Alejandro Piñeiro, Javier D. Bruguera, Jean-Michel Muller
- IEEE Symposium on Computer Arithmetic
- 2001

- José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
- VLSI Signal Processing
- 2005

A high-radix digit-recurrence algorithm for the computation of the logarithm, and an analysis of the tradeoffs between area and speed for its implementation, are presented in this paper. Selection by rounding is used in iterations j ≥ 2, and by table look-up in the first iteration. A sequential architecture is proposed, and estimates of the execution time… (More)

A FPGA implementation of a method f o r the calculation of faithfully rounded single-precision joating-point powering (XP) is presented in this paper. A second-degree minimax polynomial approximation is used, together with the employment of table look-up, a specialized squaring unit and a fused accumulation tree. The FPGA implementation of an architecture… (More)

- Paolo Montuschi, Javier D. Bruguera, Luigi Ciminiera, José-Alejandro Piñeiro
- IEEE Transactions on Computers
- 2007

A general digit-recurrence algorithm for the computation of the mth root (with an m integer) is presented in this paper. Based on the concept of completing the mth root, a detailed analysis of the convergence conditions is performed and iteration- independent digit-selection rules are obtained for any radix and redundant digit set. A radix-2 version for mth… (More)

- José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
- IEEE Symposium on Computer Arithmetic
- 2003

A high-radix composite algorithm for the computation of the powering function ( ) is presented in this paper. The algorithm consists of a sequence of overlapped operations: (i) digitrecurrence logarithm, (ii) left-to-right carry-free (LRCF) multiplications, and (iii) on-line exponential. A redundant number system is used, and the selection in (i) and (iii)… (More)

An analysis of the tradeoffs between area and speed for a sequential implementation of a high-radix recurrence for logarithm computation is presented in this paper. The high-radix algorithm is outlined and a sequential architecture is proposed, with the use of selection by rounding of the digits and redundant representation. Estimates of the execution time… (More)