José A. Villasante-Bembibre

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This paper presents an 8-bit FPGA implementation of a Discrete Time Cellular Neural Network (DTCNN) suitable for small image gray-scale pre-processing (simple operations with high computational burden). It uses Split&Shift techniques to have a 31 × 31 grid that processes more than 2500 images per second. As this work evolves from a previous(More)
This paper introduces two applications of Discrete Time Cellular Non-Linear Networks (DTCNN) in a robot guiding avoiding obstacles algorithm and prove the feasibility of both applications: a high data rate one, using a CMOS camera, and small data rate one, using ultrasonic sensors. The key value of DTCNNs is the locally connections and the parallelism in(More)
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