Jordy Potman

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As an example of a systematic procedure for evaluating UMTS downlink DSP functions for adaptivity we study bit-error-rate performance tradeoffs between the spreading factor, the symbol constellation size and the number of used Rake fingers in UMTS despreading and demodulation. After an overview of the DSP functions that are used in UMTS downlink(More)
Today's reconfigurable multicore architectures become more and more complex. They consist of several processing units, not necessarily identical, different interconnecting modules, memories and possibly other components. Programming such kind of architectures requires deep knowledge of the underlying hardware and is thus very time consuming and error prone.(More)
Blind adaptive Minimum Mean Square Error (MMSE) detection is theoretically one of the most promising multiuser detection techniques for cellular wireless CodeDivision Multiple Access (CDMA) systems, but its implementation has not yet been studied extensively. Therefore the goal of the research described in this paper is to study the implementation of blind(More)
This paper describes a novel on-demand receive filter in an UMTS terminal. The receive filter is the first function after the Analog-to-Digital converter and is for that reason one of the most computation intensive parts in a receiver. The proposed filter architecture measures the out-of-band interference and calculates the required attenuation, which is(More)
In every wireless system, the weakest link determines the performance of the network. In this paper the Radio Frequency (RF) performance of both band III and L-band Terrestrial Digital Audio Broadcasting (T-DAB) consumer receivers are discussed. The receivers have been tested based on the EN 50248 standard. The test results show that the average consumer(More)
Commercial off-the-shelf (COTS) components are increasingly being employed in embedded systems due to their high performance at low cost. With emerging reliability requirements, design of these components using traditional hardware redundancy incur large overheads, time-demanding re-design and validation. To reduce the design time with shorter(More)