Jordan Bisasky

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—This paper presents a reconfigurable many-core platform performing fixed point DSP applications supporting up to 64 cores routed in a hierarchical network. To demonstrate an application, electroencephalogram (EEG) seizure detection and analysis is mapped onto the cores. The individual cores are based on a 5 stage RISC pipeline architecture optimized to(More)
This paper presents a programmable many-core platform containing 64 cores routed in a hierarchical network tor biomedical signal processing applications. Individual core processors are based on a RISC architecture with DSP enhance­ ment blocks. Given the number of conditional program loops in DSP applications such as FFT, additional hardware blocks are(More)
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